Courses
EECS 149 Introduction to Embedded Systems 4 Units
Terms offered: Fall 2017, Fall 2016, Fall 2015
This course introduces students to the basics of modeling, analysis, and design of embedded, cyber-physical systems. Students learn how to integrate computation with physical processes to meet a desired specification. Topics include models of computation, control, analysis and verification, interfacing with the physical world, real-time behaviors, mapping to platforms, and distributed embedded systems. The course has a strong laboratory component, with emphasis on a semester-long sequence of projects.
Objectives Outcomes
Course Objectives: To develop the skills to realize embedded systems that are safe, reliable, and efficient in their use of resources.
To learn how to model and design the joint dynamics of software, networks, and physical processes.
To learn to think critically about technologies that are available for achieving such joint dynamics.
Rules & Requirements
Prerequisites: EE 16A & B, or permission of instructor; CS 61C and CS 70
Hours & Format
Fall and/or spring: 15 weeks - 3 hours of lecture and 3 hours of laboratory per week
Additional Details
Subject/Course Level: Electrical Engin and Computer Sci/Undergraduate
Grading/Final exam status: Letter grade. Alternative to final exam.
Instructors: Seshia, Lee
EECS 151 Introduction to Digital Design and Integrated Circuits 3 Units
Terms offered: Fall 2017, Spring 2017, Fall 2016
An introduction to digital and system design. The material provides a top-down view of the principles, components, and methodologies for large scale digital system design. The underlying CMOS devices and manufacturing technologies are introduced, but quickly abstracted to higher-levels to focus the class on design of larger digital modules for both FPGAs (field programmable gate arrays) and ASICs (application specific integrated circuits). The class includes extensive use of industrial grade design automation and verification tools for assignments, labs and projects.
The class has two lab options: ASIC Lab (EECS 151LA) and FPGA Lab (EECS 151LB). Students must enroll in at least one of the labs concurrently with the class.
Objectives Outcomes
Course Objectives: The Verilog hardware description language is introduced and used. Basic digital system design concepts, Boolean operations/combinational logic, sequential elements and finite-state-machines, are described. Design of larger building blocks such as arithmetic units, interconnection networks, input/output units, as well as memory design (SRAM, Caches, FIFOs) and integration are also covered. Parallelism, pipelining and other micro-architectural optimizations are introduced. A number of physical design issues visible at the architecture level are covered as well, such as interconnects, power, and reliability.
Rules & Requirements
Prerequisites: Electrical Engineering 16A & 16B
Credit Restrictions: Students must enroll concurrently in at least one the lab flavors EECS151LA or EECS151LB. Students wishing to take a second lab flavor next term can sign-up only for that Lab section and receive a Letter grade. The pre-requisite for “Lab-only” enrollment that term will be EECS151 from previous terms.
Hours & Format
Fall and/or spring: 15 weeks - 3 hours of lecture and 1 hour of discussion per week
Additional Details
Subject/Course Level: Electrical Engin and Computer Sci/Undergraduate
Grading/Final exam status: Letter grade. Final exam required.
Instructors: Stojanovic, Wawrzynek
EECS 151LA Application Specific Integrated Circuits Laboratory 2 Units
Terms offered: Fall 2017, Spring 2017, Fall 2016
This lab lays the foundation of modern digital design by first presenting the scripting and hardware description language base for specification of digital systems and interactions with tool flows. The labs are centered on a large design with the focus on rapid design space exploration. The lab exercises culminate with a project design, e.g., implementation of a three-stage RISC-V processor with a register file and caches. The design is mapped to simulation and layout specification.
Objectives Outcomes
Course Objectives: Software testing of digital designs is covered leading to a set of exercises that cover the design flow. Digital synthesis, floor-planning, placement and routing are covered, as well as tools to evaluate timing and power consumption. Chip-level assembly is covered, including instantiation of custom blocks: I/O pads, memories, PLLs, etc.
Rules & Requirements
Prerequisites: Computer Science 61C, Electrical Engineering 16A & 16B, Electrical Engineering 105
Hours & Format
Fall and/or spring: 15 weeks - 3 hours of laboratory per week
Additional Details
Subject/Course Level: Electrical Engin and Computer Sci/Undergraduate
Grading/Final exam status: Letter grade. Final exam not required.
Instructors: Stojanovic, Wawrzynek
EECS 151LB Field-Programmable Gate Array Laboratory 2 Units
Terms offered: Fall 2017, Spring 2017, Fall 2016
This lab covers the design of modern digital systems with Field-Programmable Gate Array (FPGA) platforms. A series of lab exercises provide the background and practice of digital design using a modern FPGA design tool flow. Digital synthesis, partitioning, placement, routing, and simulation tools for FPGAs are covered in detail. The labs exercises culminate with a large design project, e.g., an implementation of a full three-stage RISC-V processor system, with caches, graphics acceleration, and external peripheral components. The design is mapped and demonstrated on an FPGA hardware platform.
Rules & Requirements
Prerequisites: Electrical Engineering 16A & 16B; Electrical Engineering 105 recommended and Computer Science 61C
Hours & Format
Fall and/or spring: 15 weeks - 3 hours of laboratory per week
Additional Details
Subject/Course Level: Electrical Engin and Computer Sci/Undergraduate
Grading/Final exam status: Letter grade. Final exam not required.
Instructors: Stojanovic, Wawrzynek
EECS 251A Introduction to Digital Design and Integrated Circuits 3 Units
Terms offered: Fall 2017, Spring 2017, Fall 2016
An introduction to digital circuit and system design. The material provides a top-down view of the principles, components, and methodologies for large scale digital system design. The underlying CMOS devices and manufacturing technologies are introduced, but quickly abstracted to higher levels to focus the class on design of larger digital modules for both FPGAs (field programmable gate arrays) and ASICs (application specific integrated circuits). The class includes extensive use of industrial grade design automation and verification tools for assignments, labs, and projects.
Objectives Outcomes
Course Objectives: The Verilog hardware description language is introduced and used. Basic digital system design concepts, Boolean operations/combinational logic, sequential elements and finite-state-machines, are described. Design of larger building blocks such as arithmetic units, interconnection networks, input/output units, as well as memory design (SRAM, Caches, FIFOs) and integration are also covered. Parallelism, pipelining and other micro-architectural optimizations are introduced. A number of physical design issues visible at the architecture level are covered as well, such as interconnects, power, and reliability.
Student Learning Outcomes: Although the syllabus is the same as EECS151, the assignments and exams for EECS251A will have harder problems that test deeper understanding expected from a graduate level course.
Rules & Requirements
Prerequisites: Electrical Engineering 16A & 16B; Computer Science 61C; and recommended: Electrical Engineering 105. Students must enroll concurrently in at least one the laboratory flavors Electrical Engineering and Computer Science 251LA or Electrical Engineering and Computer Science 251LB. Students wishing to take a second laboratory flavor next term can sign-up only for that laboratory section and receive a letter grade. The pre-requisite for “Lab-only” enrollment that term will be Electrical Engineering an
Credit Restrictions: Students must enroll concurrently in at least one the laboratory flavors Electrical Engineering and Computer Science 251LA or Electrical Engineering and Computer Science 251LB. Students wishing to take a second laboratory flavor next term can sign-up only for that laboratory section and receive a letter grade. The pre-requisite for “Lab-only” enrollment that term will be Electrical Engineering and Computer Science 251A from previous terms.
Hours & Format
Fall and/or spring: 15 weeks - 3 hours of lecture and 1 hour of discussion per week
Additional Details
Subject/Course Level: Electrical Engin and Computer Sci/Graduate
Grading: Letter grade.
Instructors: Stojanovic, Wawrzynek
Formerly known as: Electrical Engineering 241A
EECS 251LA Introduction to Digital Design and Integrated Circuits Lab 2 Units
Terms offered: Fall 2017, Spring 2017, Fall 2016
This lab lays the foundation of modern digital design by first presenting the scripting and hardware description language base for specification of digital systems and interactions with tool flows. The labs are centered on a large design with the focus on rapid design space exploration. The lab exercises culminate with a project design, e.g. implementation of a 3-stage RISC-V processor with a register file and caches. The design is mapped to simulation and layout specification.
Objectives Outcomes
Course Objectives: Software testing of digital designs is covered leading to a set of exercises that cover the design flow. Digital synthesis, floor-planning, placement and routing are covered, as well as tools to evaluate timing and power consumption. Chip-level assembly is covered, including instantiation of custom blocks: I/O pads, memories, PLLs, etc.
Student Learning Outcomes: Although the syllabus is the same as EECS151LA, the assignments and exams for EECS251LA will have harder problems in labs and in the project that test deeper understanding expected from a graduate level course.
Rules & Requirements
Prerequisites: Electrical Engineering 16A & 16B; Computer Science 61C; and recommended: Electrical Engineering 105
Hours & Format
Fall and/or spring: 15 weeks - 3 hours of laboratory per week
Additional Details
Subject/Course Level: Electrical Engin and Computer Sci/Graduate
Grading: Letter grade.
Instructors: Stojanovic, Wawrzynek
EECS 251LB Introduction to Digital Design and Integrated Circuits Lab 2 Units
Terms offered: Fall 2017, Spring 2017, Fall 2016
This lab covers the design of modern digital systems with Field-Programmable Gate Array (FPGA) platforms. A series of lab exercises provide the background and practice of digital design using a modern FPGA design tool flow. Digital synthesis, partitioning, placement, routing, and simulation tools for FPGAs are covered in detail. The labs exercises culminate with a large design project, e.g., an implementation of a full 3-stage RISC-V processor system, with caches, graphics acceleration, and external peripheral components. The design is mapped and demonstrated on an FPGA hardware platform.
Objectives Outcomes
Student Learning Outcomes: Although the syllabus is the same as EECS151LB, the assignments and exams for EECS251LB will have harder problems in labs and in the project that test deeper understanding expected from a graduate level course.
Rules & Requirements
Prerequisites: Electrical Engineering 16A & 16B; Computer Science 61C; and recommended: Electrical Engineering 105
Hours & Format
Fall and/or spring: 15 weeks - 3 hours of laboratory per week
Additional Details
Subject/Course Level: Electrical Engin and Computer Sci/Graduate
Grading: Letter grade.
Instructors: Stojanovic, Wawrzynek